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/* Copyright (C) 2017-2021 Free Software Foundation, Inc. |
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|
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This file is part of GCC. |
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|
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GCC is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3, or (at your option) |
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any later version. |
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|
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GCC is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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Under Section 7 of GPL version 3, you are granted additional |
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permissions described in the GCC Runtime Library Exception, version |
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3.1, as published by the Free Software Foundation. |
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|
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You should have received a copy of the GNU General Public License and |
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a copy of the GCC Runtime Library Exception along with this program; |
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
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<http://www.gnu.org/licenses/>. */ |
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|
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#ifndef _IMMINTRIN_H_INCLUDED |
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#error "Never use <gfniintrin.h> directly; include <immintrin.h> instead." |
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#endif |
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|
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#ifndef _GFNIINTRIN_H_INCLUDED |
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#define _GFNIINTRIN_H_INCLUDED |
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|
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#if !defined(__GFNI__) || !defined(__SSE2__) |
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#pragma GCC push_options |
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#pragma GCC target("gfni,sse2") |
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#define __DISABLE_GFNI__ |
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#endif /* __GFNI__ */ |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_gf2p8mul_epi8 (__m128i __A, __m128i __B) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A, |
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(__v16qi) __B); |
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} |
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|
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#ifdef __OPTIMIZE__ |
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_gf2p8affineinv_epi64_epi8 (__m128i __A, __m128i __B, const int __C) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A, |
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(__v16qi) __B, |
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__C); |
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} |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_gf2p8affine_epi64_epi8 (__m128i __A, __m128i __B, const int __C) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi) __A, |
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(__v16qi) __B, __C); |
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} |
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#else |
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#define _mm_gf2p8affineinv_epi64_epi8(A, B, C) \ |
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((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \ |
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(__v16qi)(__m128i)(B), (int)(C))) |
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#define _mm_gf2p8affine_epi64_epi8(A, B, C) \ |
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((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi)(__m128i)(A), \ |
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(__v16qi)(__m128i)(B), (int)(C))) |
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#endif |
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|
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#ifdef __DISABLE_GFNI__ |
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#undef __DISABLE_GFNI__ |
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#pragma GCC pop_options |
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#endif /* __DISABLE_GFNI__ */ |
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|
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#if !defined(__GFNI__) || !defined(__AVX__) |
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#pragma GCC push_options |
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#pragma GCC target("gfni,avx") |
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#define __DISABLE_GFNIAVX__ |
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#endif /* __GFNIAVX__ */ |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_gf2p8mul_epi8 (__m256i __A, __m256i __B) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi ((__v32qi) __A, |
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(__v32qi) __B); |
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} |
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|
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#ifdef __OPTIMIZE__ |
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_gf2p8affineinv_epi64_epi8 (__m256i __A, __m256i __B, const int __C) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi ((__v32qi) __A, |
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(__v32qi) __B, |
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__C); |
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} |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_gf2p8affine_epi64_epi8 (__m256i __A, __m256i __B, const int __C) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi) __A, |
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(__v32qi) __B, __C); |
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} |
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#else |
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#define _mm256_gf2p8affineinv_epi64_epi8(A, B, C) \ |
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((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \ |
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(__v32qi)(__m256i)(B), \ |
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(int)(C))) |
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#define _mm256_gf2p8affine_epi64_epi8(A, B, C) \ |
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((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi)(__m256i)(A), \ |
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( __v32qi)(__m256i)(B), (int)(C))) |
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#endif |
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|
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#ifdef __DISABLE_GFNIAVX__ |
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#undef __DISABLE_GFNIAVX__ |
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#pragma GCC pop_options |
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#endif /* __GFNIAVX__ */ |
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|
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#if !defined(__GFNI__) || !defined(__AVX512VL__) |
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#pragma GCC push_options |
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#pragma GCC target("gfni,avx512vl") |
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#define __DISABLE_GFNIAVX512VL__ |
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#endif /* __GFNIAVX512VL__ */ |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_mask_gf2p8mul_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __C, |
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(__v16qi) __D, |
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(__v16qi)__A, __B); |
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} |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_maskz_gf2p8mul_epi8 (__mmask16 __A, __m128i __B, __m128i __C) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __B, |
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(__v16qi) __C, (__v16qi) _mm_setzero_si128 (), __A); |
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} |
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|
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#ifdef __OPTIMIZE__ |
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_mask_gf2p8affineinv_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C, |
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__m128i __D, const int __E) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __C, |
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(__v16qi) __D, |
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__E, |
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(__v16qi)__A, |
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__B); |
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} |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_maskz_gf2p8affineinv_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C, |
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const int __D) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __B, |
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(__v16qi) __C, __D, |
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(__v16qi) _mm_setzero_si128 (), |
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__A); |
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} |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_mask_gf2p8affine_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C, |
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__m128i __D, const int __E) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __C, |
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(__v16qi) __D, __E, (__v16qi)__A, __B); |
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} |
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|
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extern __inline __m128i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm_maskz_gf2p8affine_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C, |
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const int __D) |
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{ |
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return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __B, |
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(__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A); |
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} |
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#else |
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#define _mm_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ |
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((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \ |
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(__v16qi)(__m128i)(C), (__v16qi)(__m128i)(D), \ |
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(int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B))) |
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#define _mm_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ |
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((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \ |
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(__v16qi)(__m128i)(B), (__v16qi)(__m128i)(C), \ |
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(int)(D), (__v16qi)(__m128i) _mm_setzero_si128 (), \ |
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(__mmask16)(A))) |
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#define _mm_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ |
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((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(C),\ |
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(__v16qi)(__m128i)(D), (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B))) |
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#define _mm_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ |
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((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(B),\ |
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(__v16qi)(__m128i)(C), (int)(D), \ |
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(__v16qi)(__m128i) _mm_setzero_si128 (), (__mmask16)(A))) |
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#endif |
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|
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#ifdef __DISABLE_GFNIAVX512VL__ |
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#undef __DISABLE_GFNIAVX512VL__ |
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#pragma GCC pop_options |
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#endif /* __GFNIAVX512VL__ */ |
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|
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#if !defined(__GFNI__) || !defined(__AVX512VL__) || !defined(__AVX512BW__) |
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#pragma GCC push_options |
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#pragma GCC target("gfni,avx512vl,avx512bw") |
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#define __DISABLE_GFNIAVX512VLBW__ |
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#endif /* __GFNIAVX512VLBW__ */ |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_mask_gf2p8mul_epi8 (__m256i __A, __mmask32 __B, __m256i __C, |
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__m256i __D) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __C, |
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(__v32qi) __D, |
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(__v32qi)__A, __B); |
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} |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_maskz_gf2p8mul_epi8 (__mmask32 __A, __m256i __B, __m256i __C) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __B, |
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(__v32qi) __C, (__v32qi) _mm256_setzero_si256 (), __A); |
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} |
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|
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#ifdef __OPTIMIZE__ |
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_mask_gf2p8affineinv_epi64_epi8 (__m256i __A, __mmask32 __B, |
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__m256i __C, __m256i __D, const int __E) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __C, |
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(__v32qi) __D, |
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__E, |
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(__v32qi)__A, |
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__B); |
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} |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_maskz_gf2p8affineinv_epi64_epi8 (__mmask32 __A, __m256i __B, |
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__m256i __C, const int __D) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __B, |
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(__v32qi) __C, __D, |
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(__v32qi) _mm256_setzero_si256 (), __A); |
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} |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_mask_gf2p8affine_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C, |
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__m256i __D, const int __E) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __C, |
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(__v32qi) __D, |
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__E, |
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(__v32qi)__A, |
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__B); |
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} |
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|
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extern __inline __m256i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm256_maskz_gf2p8affine_epi64_epi8 (__mmask32 __A, __m256i __B, |
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__m256i __C, const int __D) |
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{ |
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return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __B, |
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(__v32qi) __C, __D, (__v32qi)_mm256_setzero_si256 (), __A); |
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} |
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#else |
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#define _mm256_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ |
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((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \ |
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(__v32qi)(__m256i)(C), (__v32qi)(__m256i)(D), (int)(E), \ |
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(__v32qi)(__m256i)(A), (__mmask32)(B))) |
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#define _mm256_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ |
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((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \ |
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(__v32qi)(__m256i)(B), (__v32qi)(__m256i)(C), (int)(D), \ |
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(__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A))) |
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#define _mm256_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ |
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((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(C),\ |
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(__v32qi)(__m256i)(D), (int)(E), (__v32qi)(__m256i)(A), (__mmask32)(B))) |
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#define _mm256_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ |
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((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(B),\ |
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(__v32qi)(__m256i)(C), (int)(D), \ |
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(__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A))) |
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#endif |
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|
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#ifdef __DISABLE_GFNIAVX512VLBW__ |
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#undef __DISABLE_GFNIAVX512VLBW__ |
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#pragma GCC pop_options |
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#endif /* __GFNIAVX512VLBW__ */ |
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|
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#if !defined(__GFNI__) || !defined(__AVX512F__) || !defined(__AVX512BW__) |
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#pragma GCC push_options |
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#pragma GCC target("gfni,avx512f,avx512bw") |
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#define __DISABLE_GFNIAVX512FBW__ |
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#endif /* __GFNIAVX512FBW__ */ |
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|
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extern __inline __m512i |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 308 |
_mm512_mask_gf2p8mul_epi8 (__m512i __A, __mmask64 __B, __m512i __C, |
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__m512i __D) |
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{ |
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return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __C, |
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(__v64qi) __D, (__v64qi)__A, __B); |
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} |
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|
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extern __inline __m512i |
| 316 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 317 |
_mm512_maskz_gf2p8mul_epi8 (__mmask64 __A, __m512i __B, __m512i __C) |
| 318 |
{ |
| 319 |
return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __B, |
| 320 |
(__v64qi) __C, (__v64qi) _mm512_setzero_si512 (), __A); |
| 321 |
} |
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extern __inline __m512i |
| 323 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 324 |
_mm512_gf2p8mul_epi8 (__m512i __A, __m512i __B) |
| 325 |
{ |
| 326 |
return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi ((__v64qi) __A, |
| 327 |
(__v64qi) __B); |
| 328 |
} |
| 329 |
|
| 330 |
#ifdef __OPTIMIZE__ |
| 331 |
extern __inline __m512i |
| 332 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 333 |
_mm512_mask_gf2p8affineinv_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C, |
| 334 |
__m512i __D, const int __E) |
| 335 |
{ |
| 336 |
return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __C, |
| 337 |
(__v64qi) __D, |
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__E, |
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(__v64qi)__A, |
| 340 |
__B); |
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} |
| 342 |
|
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extern __inline __m512i |
| 344 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 345 |
_mm512_maskz_gf2p8affineinv_epi64_epi8 (__mmask64 __A, __m512i __B, |
| 346 |
__m512i __C, const int __D) |
| 347 |
{ |
| 348 |
return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __B, |
| 349 |
(__v64qi) __C, __D, |
| 350 |
(__v64qi) _mm512_setzero_si512 (), __A); |
| 351 |
} |
| 352 |
|
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extern __inline __m512i |
| 354 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 355 |
_mm512_gf2p8affineinv_epi64_epi8 (__m512i __A, __m512i __B, const int __C) |
| 356 |
{ |
| 357 |
return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ((__v64qi) __A, |
| 358 |
(__v64qi) __B, __C); |
| 359 |
} |
| 360 |
|
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extern __inline __m512i |
| 362 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 363 |
_mm512_mask_gf2p8affine_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C, |
| 364 |
__m512i __D, const int __E) |
| 365 |
{ |
| 366 |
return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __C, |
| 367 |
(__v64qi) __D, __E, (__v64qi)__A, __B); |
| 368 |
} |
| 369 |
|
| 370 |
extern __inline __m512i |
| 371 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 372 |
_mm512_maskz_gf2p8affine_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C, |
| 373 |
const int __D) |
| 374 |
{ |
| 375 |
return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __B, |
| 376 |
(__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A); |
| 377 |
} |
| 378 |
extern __inline __m512i |
| 379 |
__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
| 380 |
_mm512_gf2p8affine_epi64_epi8 (__m512i __A, __m512i __B, const int __C) |
| 381 |
{ |
| 382 |
return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi) __A, |
| 383 |
(__v64qi) __B, __C); |
| 384 |
} |
| 385 |
#else |
| 386 |
#define _mm512_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ |
| 387 |
((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \ |
| 388 |
(__v64qi)(__m512i)(C), (__v64qi)(__m512i)(D), (int)(E), \ |
| 389 |
(__v64qi)(__m512i)(A), (__mmask64)(B))) |
| 390 |
#define _mm512_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ |
| 391 |
((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \ |
| 392 |
(__v64qi)(__m512i)(B), (__v64qi)(__m512i)(C), (int)(D), \ |
| 393 |
(__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A))) |
| 394 |
#define _mm512_gf2p8affineinv_epi64_epi8(A, B, C) \ |
| 395 |
((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ( \ |
| 396 |
(__v64qi)(__m512i)(A), (__v64qi)(__m512i)(B), (int)(C))) |
| 397 |
#define _mm512_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ |
| 398 |
((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(C),\ |
| 399 |
(__v64qi)(__m512i)(D), (int)(E), (__v64qi)(__m512i)(A), (__mmask64)(B))) |
| 400 |
#define _mm512_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ |
| 401 |
((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(B),\ |
| 402 |
(__v64qi)(__m512i)(C), (int)(D), \ |
| 403 |
(__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A))) |
| 404 |
#define _mm512_gf2p8affine_epi64_epi8(A, B, C) \ |
| 405 |
((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi)(__m512i)(A), \ |
| 406 |
(__v64qi)(__m512i)(B), (int)(C))) |
| 407 |
#endif |
| 408 |
|
| 409 |
#ifdef __DISABLE_GFNIAVX512FBW__ |
| 410 |
#undef __DISABLE_GFNIAVX512FBW__ |
| 411 |
#pragma GCC pop_options |
| 412 |
#endif /* __GFNIAVX512FBW__ */ |
| 413 |
|
| 414 |
#endif /* _GFNIINTRIN_H_INCLUDED */ |
