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/* Copyright (C) 2019-2021 Free Software Foundation, Inc. |
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|
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This file is part of GCC. |
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|
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GCC is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 3, or (at your option) |
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any later version. |
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|
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GCC is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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Under Section 7 of GPL version 3, you are granted additional |
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permissions described in the GCC Runtime Library Exception, version |
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3.1, as published by the Free Software Foundation. |
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|
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You should have received a copy of the GNU General Public License and |
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a copy of the GCC Runtime Library Exception along with this program; |
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
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<http://www.gnu.org/licenses/>. */ |
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|
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#ifndef _IMMINTRIN_H_INCLUDED |
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#error "Never use <avx512bf16intrin.h> directly; include <immintrin.h> instead." |
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#endif |
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|
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#ifndef _AVX512BF16INTRIN_H_INCLUDED |
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#define _AVX512BF16INTRIN_H_INCLUDED |
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|
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#ifndef __AVX512BF16__ |
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#pragma GCC push_options |
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#pragma GCC target("avx512bf16") |
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#define __DISABLE_AVX512BF16__ |
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#endif /* __AVX512BF16__ */ |
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|
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/* Internal data types for implementing the intrinsics. */ |
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typedef short __v32bh __attribute__ ((__vector_size__ (64))); |
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|
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/* The Intel API is flexible enough that we must allow aliasing with other |
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vector types, and their scalar components. */ |
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typedef short __m512bh __attribute__ ((__vector_size__ (64), __may_alias__)); |
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|
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/* vcvtne2ps2bf16 */ |
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|
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extern __inline __m512bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_cvtne2ps_pbh (__m512 __A, __m512 __B) |
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{ |
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return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi(__A, __B); |
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} |
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|
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extern __inline __m512bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_mask_cvtne2ps_pbh (__m512bh __A, __mmask32 __B, __m512 __C, __m512 __D) |
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{ |
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return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_mask(__C, __D, __A, __B); |
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} |
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|
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extern __inline __m512bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_maskz_cvtne2ps_pbh (__mmask32 __A, __m512 __B, __m512 __C) |
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{ |
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return (__m512bh)__builtin_ia32_cvtne2ps2bf16_v32hi_maskz(__B, __C, __A); |
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} |
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|
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/* vcvtneps2bf16 */ |
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|
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extern __inline __m256bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_cvtneps_pbh (__m512 __A) |
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{ |
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return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf(__A); |
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} |
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|
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extern __inline __m256bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_mask_cvtneps_pbh (__m256bh __A, __mmask16 __B, __m512 __C) |
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{ |
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return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_mask(__C, __A, __B); |
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} |
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|
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extern __inline __m256bh |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_maskz_cvtneps_pbh (__mmask16 __A, __m512 __B) |
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{ |
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return (__m256bh)__builtin_ia32_cvtneps2bf16_v16sf_maskz(__B, __A); |
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} |
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|
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/* vdpbf16ps */ |
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|
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extern __inline __m512 |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_dpbf16_ps (__m512 __A, __m512bh __B, __m512bh __C) |
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{ |
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return (__m512)__builtin_ia32_dpbf16ps_v16sf(__A, __B, __C); |
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} |
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|
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extern __inline __m512 |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_mask_dpbf16_ps (__m512 __A, __mmask16 __B, __m512bh __C, __m512bh __D) |
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{ |
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return (__m512)__builtin_ia32_dpbf16ps_v16sf_mask(__A, __C, __D, __B); |
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} |
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|
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extern __inline __m512 |
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__attribute__((__gnu_inline__, __always_inline__, __artificial__)) |
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_mm512_maskz_dpbf16_ps (__mmask16 __A, __m512 __B, __m512bh __C, __m512bh __D) |
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{ |
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return (__m512)__builtin_ia32_dpbf16ps_v16sf_maskz(__B, __C, __D, __A); |
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} |
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|
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#ifdef __DISABLE_AVX512BF16__ |
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#undef __DISABLE_AVX512BF16__ |
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#pragma GCC pop_options |
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#endif /* __DISABLE_AVX512BF16__ */ |
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|
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#endif /* _AVX512BF16INTRIN_H_INCLUDED */ |
